IMPLEMENTATION OF EDGE DETECTION ALGORITHM ON XILINX SPARTAN 6
In this project, I implemented the Sobel edge detection algorithm on XILINX SPARTAN 6.
This project had three main steps:
step one) This step we preprocessed our image and divided it to 16 IPCores. Here we assumed every input pixel is 128*128. As a result, each IPCore contains 32*32 pixels of the main picture.
Step two) This was the primary step. I used 16 edge detection module to process each IPCore and find edges in each area. Every EdgeDet.v module is the implementation of The Sobel algorithm in Verilog language.
Step three) As final step output was given by the UART module. The final result can be made by concatenating the UART module output after this step.
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